Talks
2021
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Can we solve timing side-channels in the CPU ?
Details
Slides
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Timesecbench: Évaluation des fuites d’information par dépendances temporelles dans la microarchitecture
Details
Slides
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Timesecbench: a work in progress benchmark suite to assess microarchitectural timing leakages
Details
Slides
2019
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Why there is no silver bullet to solve our security issues
Details
Slides
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Electromagnetic fault injection against a System-on-Chip
Details
Slides
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How modern System-on-Chips are vulnerable to fault attacks
Details
Slides
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Do Not Trust Modern System-on-Chips
Details
Slides